Physical Design Engineer Product Engineering
Santa Clara, CA 
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Posted 1 day ago
Job Description

Physical Design Engineer

* Responsible for implementation of ultra-high performance and low power data processing chip

* Work with RTL designers to achieve PPA goals and suggest appropriate tradeoffs

* Floor-planning, experimenting with placement and routing techniques for better PPA

* Do timing closure for very high frequency designs with possible hand placement of logic when needed

* Help define low latency/low skew clock tree methodology/design

* Scripting and automating flows to improve turn-around times

Required:

* Member of core team responsible for the crafting and timely delivery of physical design partitions

* More than 5 years of experience in high performance semiconductor designs

* Verilog knowledge and an understanding of ASIC design flow

* Expertise in logic synthesis, prototyping, timing analysis, floor-planning

* Expertise in flow automation (Perl, Tcl, Python) and understanding of full physical design methodology

* Experience with Cadence Innovus on 7nm or lower technology nodes

* Previous experience working on high frequency designs (3GHz or higher)

* Previous experience low latency/low skew clock designs (less than 30 picoseconds)

Desired:

* CPU experience desired


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Yoh, a Day & Zimmermann company, is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran. Visit to contact us if you are an individual with a disability and require accommodation in the application process.


Yoh, a Day & Zimmermann company, is an Equal Opportunity Employer, M/F/D/V.

 

Job Summary
Start Date
As soon as possible
Employment Term and Type
Regular, Full Time
Required Experience
5+ years
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